SX1210I084T【PDF 50/73 页】IC SINGLE-CHIP RECEIVER 32-TQFN

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SX1210

ADVANCED COMMUNICATIONS & SENSING

Data operation mode’s MSB. Cf. Data_mode_0 (Bit 5 Addr 1)

Data_mode_1

Data_mode_0

Data Operation

Data_mode_1

2

1

r/w

Bit 2 addr 1

0

Bit 5 addr 1

0

Mode

Continuous (d)

0

1

Gain on the IF chain:

1

x

Buffered

Packet

00

maximal gain (0dB) (d)

IF_gain

1-0

1

r/w

01

-4.5 dB

10

11

-9dB

-13.5 dB

Single side frequency deviation:

Freq_dev

7-0

2

r/w

Fdev =

f XTAL

32 ? (D + 1)

, 0 ≤ D ≤ 255, where D is the value in the register.

(d): D = “00000011” => Fdev = 100 kHz

Res

7

3

r/w

Reserved

(d): “0”

BR

6-0

3

r/w

Bit Rate =

f XTAL

64 ? (C + 1)

, 0 ≤ C ≤ 127, where C is the value in the register.

(d): C = “0000111” => Bit Rate = 25 kb/s NRZ

OOK_

floor_thresh

7-0

4

r/w

Floor threshold in OOK Rx mode. By default 6 dB.

(d): “00001100” assuming 0.5 dB RSSI step

FIFO size selection:

00

16 bytes (d)

Fifo_size

7:6

5

r/w

01

32 bytes

10

11

48 bytes

64 bytes

Rev 2– Sept 8 , 2008

Fifo_thresh

R1

P1

S1

R2

P2

S2

Res

th

5-0

7-0

7-0

7-0

7-0

7-0

7-0

7-5

5

6

7

8

9

10

11

12

r/w

r/w

r/w

r/w

r/w

r/w

r/w

r/w

FIFO threshold for interrupt source (Cf section 5.2.2.3)

(d): B = “001111”

R counter, active when RPS_select=”0”

(d):77h; default values of R1, P1, S1 generate 915.0 MHz in FSK mode

P counter, active when RPS_select=”0”

(d): 64h; default values of R1, P1, S1 generate 915.0 MHz in FSK mode

S counter, active when RPS_select=”0”

(d): 32h; default values of R1, P1, S1 generate 915.0 MHz in FSK mode

R counter, active when RPS_select=”1”

(d): 74h; default values of R2, P2, S2 generate 920.0 MHz in FSK mode

P counter, active when RPS_select=”1”

(d): 62h; default values of R2, P2, S2 generate 920.0 MHz in FSK mode

S counter, active when RPS_select=”1”

(d): 32h; default values of R2, P2, S2 generate 920.0 MHz in FSK mode

Reserved

(d): “00111000”

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